This invention pertains to semiconductor digital circuits. 2. Background Information
Prior Art
U.S. Pat. No. 4,605,870 of Dansky and Norsworthy for "High Speed Low Power Current Controlled Gate Circuit" shows six NPN transistors, a resistor, and a low barrier Schottky diode LB connected in three variations of a circuit. In each case the lower output transistor in a push-pull arrangement has its collector driven by a PNP transistor with its base shorted to its emitter which serves as a base-to-collector diode which enables capacitive coupling of the input signal to the base of the lower output transistor in the push-pull output section. The base-to-collector diode PNP transistor carries a substantial amount of current, which can be reduced employing the circuit of this invention.
An object of this invention is to use of current source technology to obtain high performance (less than 1 nsec delay) bipolar circuits at low power dissipation. The gate circuit of this invention offers excellent power dissipation characteristics. A gate circuit in accordance with this invention offers an excellent speed times power product, one competitive with CMOS and BICMOS, in gate array product programs employing +5 Volt and 0 Volt power supplies.